CIRCUITRY ASPECTS OF PROVIDING SYNCHRONIZATION CONDITIONS IN COMMUNICATION SYSTEMS WITH OFDM

Abstract

In this paper, circuitry aspects of providing synchronization conditions in OFDM communication systems are considered. Studies of estimates of inter-channel and inter-symbol interference in synchronization systems are given. Possible scenarios for estimating interference in OFDM channels from training sequences and pilot signals are described and algorithmized. Experimental results of OFDM-signal distortion estimation under conditions of inter-channel interference based on 16QAM type signals are presented. The problem of ensuring the orthogonality of subcarriers of OFDM signals under the conditions of a real interference complex is studied in order to obtain all the advantages of such signals. Possible cases of OFDM symbol temporal shift in case of interference are established. Mathematical models of OFDM signals under conditions of intersymbol and interchannel interference in a multipath channel are obtained. A comparative analysis of the root-mean-square estimate of inter-channel interference for three synchronization methods, which were studied in the article, was carried out. The constructions of OFDM signals with pilot signals are considered. The concepts of circuit implementation of clock synchronization systems in the communication channel with OFDM are studied. A timing error may be caused by a mismatch between the transmitter and receiver frequencies due to Doppler shift when intersymbol interference occurs. It is shown that, on the receiving side, the OFDM receiver samples the received continuous signal at times determined by clock synchronization. Depending on the clock mechanism, two sampling clock compensation schemes can be distinguished. The first scheme is based on a synchronous sampling format, and the second one is based on a non-synchronous one. A synchronous synchronization circuit can be represented by a circuit that controls the timing of sampling an analog signal using a voltage-controlled oscillator (VCO) and a digital phase-locked loop (PLL) circuit. The second circuit compensates for clock offset digitally after off-line sampling. The process of triggering the synchronization system to compensate for distortions based on the formed resource grid in the communication channel with OFDM is illustrated.