INVESTIGATION OF SECOND-ORDER PASSIVE SIGMA-DELTA MODULATOR

Abstract

The ever-increasing demands on the Internet of Things and portable devices are contributing to the development of the latest trends based on energy-efficient system design. This is further motivated by the relatively slow development of energy storage technologies and consumer expectations for their operation over time. To achieve low-cost large-scale integration, along with the use of acceptable digital energy efficiency, the Internet of Things and portable devices are usually integrated into deep nanoscale CMOS technology. However, it is quite difficult to implement high-performance operational amplifiers and comparators, which are necessary elements for most analog-to-digital converters (ADCs), in deep nanoscale CMONs, given the low natural gain of transistors and low supply voltage. Therefore, passive ADC topologies are an alternative to deep nanoscale CMOS to increase the overall energy efficiency of portable devices and the Internet of Things.

The paper presents the architecture of a second-order passive modulator which uses the technique of the charge-sharing rotation to suppress the effect of interstage loading in the circuit filter of a capacitor with switched condensation. An independent additional feedback path and an additional zero-input stage are added to the 2-nd stage of the low-pass filter and optimized by behavioral simulation to increase noise attenuation in the quantization range and improve stability.