IMPROVEMENT OF MULTI-CHANNEL RADIO ENGINEERING SYSTEM ON FPGA FOR FREQUENCY CONVERTERS OF PHYSICAL QUANTITIES WITH THE SUPPORT OF DIGITAL SENSORS

Abstract

The work presents the development of the functional expansion of the multi-channel radio technical system of parallel measurement of frequency informative signals based on the Altera Cyclone IV FPGA. The main task of the developed system is to measure the informative parameter of sensors of physical quantities with frequency output, using the support of digital sensors. Improved multi-channel universal measuring device based on FPGA, which has 12 measurement channels for sensors with frequency output and integrated NIOS II microprocessor core. The internal configuration of the NIOS II microprocessor core was reworked, the core block was re-synthesized, the I2C hardware implementation was created, software support for the I2C protocol was added, software support for three digital sensors was implemented, the general circuit was updated and re-synthesized. Integration of the I2C protocol into a multi-channel frequency meter will allow simultaneous measurement of values from two types of sensors, which will significantly expand the range of possible ways of using the system. One of the most common protocols - I2C was chosen for communication with digital sensors. This bus is one of the modifications of serial data exchange protocols. In the standard mode, the transmission of serial 8-bit data is provided at a speed of up to 100 kbit/s, and up to 400 kbit/s in the "fast" mode. In the previous version of the scheme, the NIOS II core was already integrated and all the main blocks were redesigned for the core interfaces. Therefore, to integrate the support of digital sensors into the existing scheme, it is only necessary to create a kernel interface for I2C, implement the I2C protocol in the form of a hardware block, and write software for I2C support. As a result, the scheme for the device was updated, one new block was added to it, which describes the I2C hardware part and the interface for the core. The maximum allowable number of chips connected to one I2C bus is limited by the maximum capacity of the bus, which is 400 pF. The UART digital protocol is used as the output interface. Also, to support the I2C protocol and digital sensors, software was developed that complements the previous version of the implementation and allows processing data from frequency meters and digital sensors at the same time.